1. Field of the Invention
The present invention relates to a method of manufacturing a multi-layer circuit board, and more particularly, to a method of manufacturing a multi-layer circuit board including fine circuit patterns having increased peel strength with respect to a substrate.
2. Description of the Related Art
Recently, due to consumers' need for multi-functional products, the size of components, which constitute an electronic device, has been considerably reduced and the number of components in the structure of an electronic device has been increased. Accordingly, there is a need to configure a circuit board to accept a plurality of electronic devices with high density.
Multi-layer circuit boards are configured by stacking a plurality of substrates in a multi-layer structure in order to constitute an electronic device. Multi-layer circuit boards can perform various functions that are electrically more complicated than a single-sided or double-sided substrate, and are configured to accept electronic elements with high density. Thus, multi-layer circuit boards have been widely used in various electronic devices.
A conventional method of manufacturing a multi-layer circuit board includes: forming circuits for connecting elements to substrates constituting respective layers; stacking a plurality of substrates; forming a via hole for electrically connecting the respective layers; and plating the via hole.
A window is formed by using etching to remove a part of the circuits of the substrates in order to perform a drill operation for forming the via hole. However, it is complicated to form the window by using etching.
In order to form circuits on the substrates constituting the respective layers, etching or a semi-additive operation is used. However, when the circuits are formed using etching, since patterns are formed according to isotropic etching via an etching solution, there is a limit in forming fine circuit patterns. In addition, since there are problems with packaging a chip and a substrate, such as air void problems due to unevenness generated on surfaces of the substrates during etching, the reliability of a product including the multi-layer circuit board can deteriorate.
In addition, when the circuits are formed using a semi-additive operation, circuit patterns are formed by plating. However, since the peel strength of the circuit patterns with respect to a substrate is low, the reliability of a product completed after packaging can deteriorate. In addition, the circuit patterns formed on the substrate can be rolled out or detached from the substrate during manufacturing the multi-layer circuit board, and thus an error rate of the multi-layer circuit board is increased.
In a conventional method of manufacturing a multi-layer circuit board, since special equipment such as desmear equipment and electroless plating equipment is required for a semi-additive operation, operations constituting the method are complicated, and manufacturing costs of the method are increased.